wireguard-linux/drivers/net/ethernet/airoha/airoha_eth.h, branch devel

Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net

2026-04-14T19:04:00Z

Merge in late fixes in preparation for the net-next PR. Conflicts: include/net/sch_generic.h a6bd339dbb351 ("net_sched: fix skb memory leak in deferred qdisc drops") ff2998f29f390 ("net: sched: introduce qdisc-specific drop reason tracing") https://lore.kernel.org/adz0iX85FHMz0HdO@sirena.org.uk drivers/net/ethernet/airoha/airoha_eth.c 1acdfbdb516b ("net: airoha: Fix VIP configuration for AN7583 SoC") bf3471e6e6c0 ("net: airoha: Make flow control source port mapping dependent on nbq parameter") Adjacent changes: drivers/net/ethernet/airoha/airoha_ppe.c f44218cd5e6a ("net: airoha: Reset PPE cpu port configuration in airoha_ppe_hw_init()") 7da62262ec96 ("inet: add ip_local_port_step_width sysctl to improve port usage distribution") Signed-off-by: Jakub Kicinski

net: airoha: Fix VIP configuration for AN7583 SoC

2026-04-14T11:26:23Z

EN7581 and AN7583 SoCs have different VIP definitions. Introduce get_vip_port callback in airoha_eth_soc_data struct in order to take into account EN7581 and AN7583 VIP register layout and definition differences. Introduce nbq parameter in airoha_gdm_port struct. At the moment nbq is set statically to value previously used in airhoha_set_gdm2_loopback routine and it will be read from device tree in subsequent patches. Fixes: e4e5ce823bdd ("net: airoha: Add AN7583 SoC support") Signed-off-by: Lorenzo Bianconi Link: https://patch.msgid.link/20260412-airoha-7583-vip-fix-v1-1-c35e02b054bb@kernel.org Signed-off-by: Paolo Abeni

Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net

2026-04-02T18:03:13Z

Cross-merge networking fixes after downstream PR (net-7.0-rc7). Conflicts: net/vmw_vsock/af_vsock.c b18c83388874 ("vsock: initialize child_ns_mode_locked in vsock_net_init()") 0de607dc4fd8 ("vsock: add G2H fallback for CIDs not owned by H2G transport") Adjacent changes: drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.c ceee35e5674a ("bnxt_en: Refactor some basic ring setup and adjustment logic") 57cdfe0dc70b ("bnxt_en: Resize RSS contexts on channel count change") drivers/net/wireless/intel/iwlwifi/mld/mac80211.c 4d56037a02bd ("wifi: iwlwifi: mld: block EMLSR during TDLS connections") 687a95d204e7 ("wifi: iwlwifi: mld: correctly set wifi generation data") drivers/net/wireless/intel/iwlwifi/mld/scan.h b6045c899e37 ("wifi: iwlwifi: mld: Refactor scan command handling") ec66ec6a5a8f ("wifi: iwlwifi: mld: Fix MLO scan timing") drivers/net/wireless/intel/iwlwifi/mvm/fw.c 078df640ef05 ("wifi: iwlwifi: mld: add support for iwl_mcc_allowed_ap_type_cmd v 2") 323156c3541e ("wifi: iwlwifi: mvm: don't send a 6E related command when not supported") Signed-off-by: Jakub Kicinski

net: airoha: Delay offloading until all net_devices are fully registered

2026-03-31T00:58:40Z

Netfilter flowtable can theoretically try to offload flower rules as soon as a net_device is registered while all the other ones are not registered or initialized, triggering a possible NULL pointer dereferencing of qdma pointer in airoha_ppe_set_cpu_port routine. Moreover, if register_netdev() fails for a particular net_device, there is a small race if Netfilter tries to offload flowtable rules before all the net_devices are properly unregistered in airoha_probe() error patch, triggering a NULL pointer dereferencing in airoha_ppe_set_cpu_port routine. In order to avoid any possible race, delay offloading until all net_devices are registered in the networking subsystem. Signed-off-by: Lorenzo Bianconi Link: https://patch.msgid.link/20260329-airoha-regiser-race-fix-v2-1-f4ebb139277b@kernel.org Signed-off-by: Jakub Kicinski

net: airoha: Reset PPE cpu port configuration in airoha_ppe_hw_init()

2026-03-21T01:27:49Z

Before this patch, the PPE cpu port configuration used for a specific GDM device was set just running ndo_init() callback during the device initialization. The selected PPE cpu port configuration depends on the QDMA block assigned to the GDM port. The QDMA block is selected according to the GDM port LAN/WAN configuration as specified in the commit '8737d7194d6d ("net: airoha: select QDMA block according LAN/WAN configuration"). However, the user selected PPE cpu port configuration can be different with respect to the one hardcoded in the NPU firmware binary. The hardcoded NPU PPE cpu port configuration is loaded initializing the PPE engine running the NPU ops ppe_init() callback in airoha_ppe_offload_setup routine (this is executed at runtime by the netfilter flowtable infrastructure during flow offloading). Reset the PPE cpu port configuration in airoha_ppe_hw_init routine in order to apply the user requested setup according to the device DTS. Please note this patch is fixing an issue not visible to the user (so we do not need to backport it) since airoha_eth driver currently supports just the internal phy available via the MT7530 DSA switch and there are no WAN interfaces officially supported since PCS/external phy is not merged mainline yet (it will be posted with following patches). Signed-off-by: Lorenzo Bianconi Reviewed-by: Simon Horman Link: https://patch.msgid.link/20260317-airoha-fix-ppe-def-cpu-v1-1-338533d8e234@kernel.org Signed-off-by: Jakub Kicinski

net: airoha: select QDMA block according LAN/WAN configuration

2026-03-17T14:09:59Z

Before this patch even GDM ports were assigned to QDMA0 while odd GDM ports were using QDMA1, so, based on the DTS configuration, both QDMA0 and QDMA1 can theoretically receive traffic destinated to the host cpu from LAN or WAN GDM ports. Airoha folks reported the hw design assumes the LAN traffic destinated to the host cpu is be forwarded to QDMA0 while traffic received on WAN GDM port is managed by QDMA1. For this reason, select QDMA block according to the GDM port LAN or WAN configuration: - QDMA0 is used for GDM LAN devices - QDMA1 is used for GDM WAN device Assuming a device with three GDM ports, a typical configuration could be: - MT7530 DSA switch -> GDM1 (eth0) -> QDMA0 (LAN traffic) - External PHY -> GDM2 (eth1) -> QDMA1 (WAN traffic) - External PHY -> GDM3 (eth2) -> QDMA0 (LAN traffic) We can then bridge eth0 DSA port (lanX) with eth2 since they all tx/rx LAN traffic. Please note this patch introduces a change not visible to the user since airoha_eth driver currently supports just the internal phy available via the MT7530 DSA switch and there are no WAN interfaces officially supported since PCS/external phy is not merged mainline yet (it will be posted with following patches). Signed-off-by: Lorenzo Bianconi Link: https://patch.msgid.link/20260313-airoha-qdma-lan-wan-mode-v2-1-7d577db6e40c@kernel.org Signed-off-by: Paolo Abeni

net: airoha: fix typo in function name

2026-02-27T03:21:40Z

Corrected the typo in the function name from `airhoa_is_lan_gdm_port` to `airoha_is_lan_gdm_port`. This change ensures consistency in the API naming convention. Signed-off-by: Zhengping Zhang Reviewed-by: Simon Horman Acked-by: Lorenzo Bianconi Link: https://patch.msgid.link/tencent_E4FD5D6BC0131E617D848896F5F9FCED6E0A@qq.com Signed-off-by: Jakub Kicinski

net: airoha_eth: increase max MTU to 9220 for DSA jumbo frames

2026-01-21T02:37:11Z

The industry standard jumbo frame MTU is 9216 bytes. When using the DSA subsystem, a 4-byte tag is added to each Ethernet frame. Increase AIROHA_MAX_MTU to 9220 bytes (9216 + 4) so that users can set a standard 9216-byte MTU on DSA ports. The underlying hardware supports significantly larger frame sizes (approximately 16K). However, the maximum MTU is limited to 9220 bytes for now, as this is sufficient to support standard jumbo frames and does not incur additional memory allocation overhead. Signed-off-by: Sayantan Nandy Reviewed-by: Andrew Lunn Acked-by: Lorenzo Bianconi Link: https://patch.msgid.link/20260119073658.6216-1-sayantann11@gmail.com Signed-off-by: Jakub Kicinski

net: airoha: Add the capability to consume out-of-order DMA tx descriptors

2025-11-08T02:47:19Z

EN7581 and AN7583 SoCs are capable of DMA mapping non-linear tx skbs on non-consecutive DMA descriptors. This feature is useful when multiple flows are queued on the same hw tx queue since it allows to fully utilize the available tx DMA descriptors and to avoid the starvation of high-priority flow we have in the current codebase due to head-of-line blocking introduced by low-priority flows. Tested-by: Xuegang Lu Reviewed-by: Jacob Keller Signed-off-by: Lorenzo Bianconi Link: https://patch.msgid.link/20251106-airoha-tx-linked-list-v2-1-0706d4a322bd@kernel.org Signed-off-by: Jakub Kicinski

net: airoha: Add AN7583 SoC support

2025-10-21T11:07:05Z

Introduce support for AN7583 ethernet controller to airoha-eth dirver. Reviewed-by: Simon Horman Signed-off-by: Lorenzo Bianconi Link: https://patch.msgid.link/20251017-an7583-eth-support-v3-13-f28319666667@kernel.org Signed-off-by: Paolo Abeni