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path: root/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
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Diffstat (limited to 'drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c')
-rw-r--r--drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c63
1 files changed, 31 insertions, 32 deletions
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
index 4c8991f3b38d..1d7f0a57d288 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
@@ -53,14 +53,14 @@
struct socfpga_dwmac;
struct socfpga_dwmac_ops {
- int (*set_phy_mode)(struct socfpga_dwmac *dwmac_priv);
+ int (*set_phy_mode)(struct socfpga_dwmac *dwmac_priv,
+ struct device *dev);
void (*setup_plat_dat)(struct socfpga_dwmac *dwmac_priv);
};
struct socfpga_dwmac {
u32 reg_offset;
u32 reg_shift;
- struct device *dev;
struct plat_stmmacenet_data *plat_dat;
struct regmap *sys_mgr_base_addr;
struct reset_control *stmmac_rst;
@@ -72,18 +72,30 @@ struct socfpga_dwmac {
const struct socfpga_dwmac_ops *ops;
};
-static void socfpga_dwmac_fix_mac_speed(void *bsp_priv, int speed,
+static phy_interface_t socfpga_get_plat_phymode(struct socfpga_dwmac *dwmac)
+{
+ return dwmac->plat_dat->phy_interface;
+}
+
+static void socfpga_sgmii_config(struct socfpga_dwmac *dwmac, bool enable)
+{
+ u16 val = enable ? SGMII_ADAPTER_ENABLE : SGMII_ADAPTER_DISABLE;
+
+ writew(val, dwmac->sgmii_adapter_base + SGMII_ADAPTER_CTRL_REG);
+}
+
+static void socfpga_dwmac_fix_mac_speed(void *bsp_priv,
+ phy_interface_t interface, int speed,
unsigned int mode)
{
struct socfpga_dwmac *dwmac = (struct socfpga_dwmac *)bsp_priv;
- struct stmmac_priv *priv = netdev_priv(dev_get_drvdata(dwmac->dev));
- void __iomem *splitter_base = dwmac->splitter_base;
void __iomem *sgmii_adapter_base = dwmac->sgmii_adapter_base;
+ phy_interface_t phymode = socfpga_get_plat_phymode(dwmac);
+ void __iomem *splitter_base = dwmac->splitter_base;
u32 val;
if (sgmii_adapter_base)
- writew(SGMII_ADAPTER_DISABLE,
- sgmii_adapter_base + SGMII_ADAPTER_CTRL_REG);
+ socfpga_sgmii_config(dwmac, false);
if (splitter_base) {
val = readl(splitter_base + EMAC_SPLITTER_CTRL_REG);
@@ -105,11 +117,9 @@ static void socfpga_dwmac_fix_mac_speed(void *bsp_priv, int speed,
writel(val, splitter_base + EMAC_SPLITTER_CTRL_REG);
}
- if ((priv->plat->phy_interface == PHY_INTERFACE_MODE_SGMII ||
- priv->plat->phy_interface == PHY_INTERFACE_MODE_1000BASEX) &&
- sgmii_adapter_base)
- writew(SGMII_ADAPTER_ENABLE,
- sgmii_adapter_base + SGMII_ADAPTER_CTRL_REG);
+ if ((phymode == PHY_INTERFACE_MODE_SGMII ||
+ phymode == PHY_INTERFACE_MODE_1000BASEX) && sgmii_adapter_base)
+ socfpga_sgmii_config(dwmac, true);
}
static int socfpga_dwmac_parse_data(struct socfpga_dwmac *dwmac, struct device *dev)
@@ -233,7 +243,6 @@ static int socfpga_dwmac_parse_data(struct socfpga_dwmac *dwmac, struct device *
dwmac->reg_offset = reg_offset;
dwmac->reg_shift = reg_shift;
dwmac->sys_mgr_base_addr = sys_mgr_base_addr;
- dwmac->dev = dev;
of_node_put(np_sgmii_adapter);
return 0;
@@ -243,18 +252,6 @@ err_node_put:
return ret;
}
-static int socfpga_get_plat_phymode(struct socfpga_dwmac *dwmac)
-{
- return dwmac->plat_dat->phy_interface;
-}
-
-static void socfpga_sgmii_config(struct socfpga_dwmac *dwmac, bool enable)
-{
- u16 val = enable ? SGMII_ADAPTER_ENABLE : SGMII_ADAPTER_DISABLE;
-
- writew(val, dwmac->sgmii_adapter_base + SGMII_ADAPTER_CTRL_REG);
-}
-
static int socfpga_set_phy_mode_common(int phymode, u32 *val)
{
switch (phymode) {
@@ -384,16 +381,17 @@ static int smtg_crosststamp(ktime_t *device, struct system_counterval_t *system,
return 0;
}
-static int socfpga_gen5_set_phy_mode(struct socfpga_dwmac *dwmac)
+static int socfpga_gen5_set_phy_mode(struct socfpga_dwmac *dwmac,
+ struct device *dev)
{
struct regmap *sys_mgr_base_addr = dwmac->sys_mgr_base_addr;
- int phymode = socfpga_get_plat_phymode(dwmac);
+ phy_interface_t phymode = socfpga_get_plat_phymode(dwmac);
u32 reg_offset = dwmac->reg_offset;
u32 reg_shift = dwmac->reg_shift;
u32 ctrl, val, module;
if (socfpga_set_phy_mode_common(phymode, &val)) {
- dev_err(dwmac->dev, "bad phy mode %d\n", phymode);
+ dev_err(dev, "bad phy mode %d\n", phymode);
return -EINVAL;
}
@@ -442,10 +440,11 @@ static int socfpga_gen5_set_phy_mode(struct socfpga_dwmac *dwmac)
return 0;
}
-static int socfpga_gen10_set_phy_mode(struct socfpga_dwmac *dwmac)
+static int socfpga_gen10_set_phy_mode(struct socfpga_dwmac *dwmac,
+ struct device *dev)
{
struct regmap *sys_mgr_base_addr = dwmac->sys_mgr_base_addr;
- int phymode = socfpga_get_plat_phymode(dwmac);
+ phy_interface_t phymode = socfpga_get_plat_phymode(dwmac);
u32 reg_offset = dwmac->reg_offset;
u32 reg_shift = dwmac->reg_shift;
u32 ctrl, val, module;
@@ -554,7 +553,7 @@ static int socfpga_dwmac_init(struct device *dev, void *bsp_priv)
{
struct socfpga_dwmac *dwmac = bsp_priv;
- return dwmac->ops->set_phy_mode(dwmac);
+ return dwmac->ops->set_phy_mode(dwmac, dev);
}
static void socfpga_gen5_setup_plat_dat(struct socfpga_dwmac *dwmac)
@@ -564,7 +563,7 @@ static void socfpga_gen5_setup_plat_dat(struct socfpga_dwmac *dwmac)
plat_dat->core_type = DWMAC_CORE_GMAC;
/* Rx watchdog timer in dwmac is buggy in this hw */
- plat_dat->riwt_off = 1;
+ plat_dat->riwt_off = true;
}
static void socfpga_agilex5_setup_plat_dat(struct socfpga_dwmac *dwmac)